Xpedition VX 2.7

The latest releases of Xpedition address the increasing complexity of today’s advanced system designs through an emphasis on both ease-of-use and team productivity. 

Does Altium really meet all your needs?

Xpedition® Enterprise is the industry’s most innovative PCB design flow, providing integration from system design definition to manufacturing execution. Its unique, patented technologies can reduce design cycles by 50% or more while significantly improving overall quality and resource efficiency.

  • Integrated Simulation Environment
  • RF Design and Simulation capability
  • Concurrent design
  • Domain level data management
  • Managed IP re-use
  • 3D Design
  • Systems-Of-Systems capability



Mentor, a Siemens business, is the only complete technology supplier, PCB design, signal & power integrity analysis, thermal, RF, cable/harness design plus Siemens brings Product Lifecycle Management, Mechanical and advanced manufacturing automation.  Our solutions are the only partner you’d need to ensure you meet your stringent timeline, cost, performance & quality goals

These quotes present data that TechValidate has sourced via direct research with verified customers and users of Mentor Xpedition. TechValidate stands behind the authenticity of all published data.

Xpedition Verification Platform

Mentor Graphics set of integrated technologies enables PCB engineers and designers to improve product quality and save time and money by moving analysis and verification tasks earlier in the design process.

  • Printed circuit board (PCB) engineers can develop accurate virtual prototypes to validate designs throughout the PCB design process with ease
  • Xpedition® platform provides the industry’s first “shift-left” upfront verification capability within the engineer’s authoring environment to minimize design re-spins and improve overall product quality

Data Management

NX 3D model support in EDM

EDM In VX.2.5 along with Siemens NX breaks down barriers with 3D model management. NX models can now be imported and exported in the EDM library cockpit ensuring tight integration, model integrity and accelerates collaboration.

Support for viewing net class & net topology in collaboration viewer

In VX.2.5, EDM Collaborate now allows users to view the net class and net topology information in the properties view. Whether you are viewing the schematic or layout, the information is available in properties and when selecting a net.

Library Manager

Creating a new schematic project? VX.2.4 makes it easier than ever to create and populate a new library with parts, symbols, and footprints, thus reducing overhead and project schedules.

PartQuest Cell Creation

Create footprints for Xpedition with the enhanced web-based, part-creation capabilities in PartQuest. Footprints are built to IPC-7351B and JEDEC JESD30H standards using a simple fill-in dialog.  

Extend/Complete EDX

Use of the EDX file format has been extended in VX.2.4. Now you can import and export all library constructs, including managed blocks and custom classes, in EDM Library, and import new objects or revise objects in an existing project in EDM Design.

Embedded Client

There’s a new way to interact with EDM Design! The embedded client in Xpedition Designer, System Designer, and Layout provides direct access to standard EDM Design functions such as search, edit, check in, and forward/back annotate. Designer and Layout automation allow access to these EDM client functions through scripting.

Web Collaboration

Save time and improve accuracy! If you have groups of nets with the same rules, you can save net topologies and constraint rules to a template for reuse. Assign any constraint to a net, save it as a template, and assign it to similar nets. When template values are updated, all nets assigned to that template are automatically updated.

Baseline, Release & Partlist

We’ve streamlined the Baseline, Release, and Create EDX functions in VX.2.4 to reduce steps and ensure consistency. Part lists created in the Collaboration view can be included in baselines and exported to EDX.

System Design


In VX.2.5 new system design rule checks were created to review system integrity. Rule checks include cross-probing from integrity results to the specific item of interest can be enabled, verification that reference designators are unique in a single board and ensuring that the board connectors and have been placed inside a board outline. Cable declarations are locked and names forwarded to the cable designer insuring that the required information is ready for correct by construction cable design.

Connector Management Enhancements

The generic symbol pin order for schematic connector does not always achieve the designers desired results. In VX.2.5, users can now use the library symbol pin order column to easily edit pin numbers and the order. Pin orders can now be easily copied from an Excel spreadsheet and the connectors can be place by the pin numbers alpha-numeric value.

Trace Signal to PCB

The VX.2.4 release enables full cross probing between System Designer, Xpedition Designer, and Xpedition Layout. Simply check out each design from EDM with sharing enabled, then select the desired net, part, or block to trace signals through the full design.

Bill of Functions

Bill of Functions provides a digitally continuous flow from System-of-Systems architecture to the physical “hardware” implementation of systems and their components. Using different abstraction levels to cope with design complexity, users can refine the design step-by-step and gradually add details. This traces the implementation status of the System Designer Interface Control Document integration between the multi-board system design and the system-of-systems project.


Improved 3D violation identification

VX.2.5 brings improvements to the online 3D DRC enabling users to identify critical interference issues quickly. From the hazard explorer users can select on interference issues and jump to their location to both view and resolve issues in the 3D environment.

New graphic triad to control 3D view

In VX.2.5 we have added a new graphic orientation triad that enables users to quickly and easily control the 3D view.

Semi-trunk routing

In VX.2.5, a new capability called Semi Trunk routing has been added to Sketch Planning. This capability allows the user to create a Sketch plan that will only be routed on one end of the plan. By choosing the new command, Route Semi-Trunk, the Sketch plan will be optimized for the end opposite the Route to Dot, and then routed. This can help the user to pre-route interfaces that may still require placement or pin and gate swapping optimization. To complete optimization of an FPGA or ASIC, and insure the placement of the interface is complete, the user can easily Reverse the Sketch plan to optimize the other end.

RF Routing and Shapes

Cut design times dramatically by using automation to construct complex RF arrays, place RF elements, and implement RF interconnects. To support a transition from very high-speed digital to RF, VX.2.4 also enables users to route signals using powerful push, shove, and gloss technology, then convert them to RF Meanders for further fine tuning.

Stitching Vias

Save parameters for stitching-via generation and reuse them by scheme. Assign plane shapes, conductive shapes, and drawing objects on user layers to a stitching-via scheme to define how vias for a given shape will be generated. The ability to select stitching vias as a new selection property type also enables quick selection and regeneration of shielding vias for a given shape.

Sketch Planner Shielding

Shielding routes during trunk routing just got a lot better! In VX.2.4, we enhanced shielding to emulate a “user-like” quality. Simply define the sets of shielding rules desired, create the desired sketch path, and assign the desired shielding rules. The sketch router automatically routes the trunk according to your rules.

MCAD – NX Integration

IDX enhancements include seamless, incremental exchange for specific objects such as flex areas, bends, and component keep-outs as well as baseline export for internal copper, silkscreen, fiducials, and partial mounting holes. Additionally, the 3D model exchange with NX has been enhanced to include the import of NX parasolid models and fast, intuitive 3D model mapping and alignment.

Test Points

Use the Constraint Manager to define the number of Test Points required for each net during schematic capture. Then use the Test Probe setup and assignment menu in Layout to view the test point totals and the actual number of placed test points.

Vibration Analysis

To reduce the setup time for vibration and acceleration analysis, Design for Reliability checks can be launched from within Layout. This enables DfR vibration and acceleration analysis to utilize all of the models, mapping, and alignment from layout.

Design Verification

New electrical rule checks

VX.2.5 brings several new electrical DRC checks. For Signal integrity, a new reference rule for traces vs. specific power net. There is also a new Min/Max routed comp to comp length rule. Additionally, there is a new Adjacent layer routing parallel coupling check as well as a new trace width check in BGA area vs. pin pad width, For Power integrity, there is now a new check for stitching via spacing. For ESD, therre is a new check to ensure that components are aligned and finally, for Safety, there is a new rule that checks the distance between soldermask/silkscreen and any objects.

Parasitic extraction for AMS

In VX.2.5, the tool now integrates directly with HyperLynx advanced solvers for automatic board parasitic extraction. You can also select nets on the schematics, extract layout parasitic effects of selected nets, insert generated parasitic effects into simulation and evaluate the parasitic effects both with and without parasitics.


Enhanced ease-of-use in Valor NPI with MRA (Manufacturing Risk Assessment) enables layout designers to run rules during layout rather than having to rely exclusively on work done by an NPI specialist post-layout. To ensure that only real issues and hazards are reported, users can set up and maintain their own DFM rules.

DC Drop – R-Flex & Multi Board

The VX.2.4 release brings additional support for rigid-flex and multi-board analysis. Power integrity enhancements include seamless DC drop simulation and analysis for rigid-flex designs. Unique stack-up by areas and their individual characteristics are seamlessly transferred from layout.

Constraint Integration

New to HyperLynx BoardSim is constraint integration, enabling users to create a wide range of signal integrity constraints and net class assignments. For comprehensive batch SI analysis, users can also import constraints directly from Xpedition schematic or layout.


HyperLynx VX.2.4 adds many usability improvements for SerDes. FastEye capability is now included within the SerDes batch wizard and requires no IC models.

New operating modes in the channel-compliance analyzer, for PCIe Gen 1 (2.5 Gbps), Gen 2 (5Gbps), and Gen 5 (32Gbps), 50GBASE-CR, and JESD204C–JCOM, bring the number of supported channels to 34.

Schematic Verification Integration

Schematic Integrity Analysis can now be launched, and new projects created, directly from within the schematic design menu. Quickly analyze a design’s Bill of Materials, netlist, and voltages. 

Electrical Rules

HyperLynx VX.2.4 brings many new electrical design rules, including analog rules for net under component, component isolation, and sensor net isolation. New power integrity rules include PDN isolation and grounding layer. Creepage rules were added and enhanced to perform distance calculations on any layer of the PCB. To save research time, additional IEC international standards and charts were also integrated into the tool.

Valor NPI Integration

To reduce the setup time for vibration and acceleration analysis, Design for Reliability checks can be launched from within Layout. This enables DfR vibration and acceleration analysis to utilize all of the models, mapping, and alignment from layout.

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